The AEW & CS’ S-band pulse-Doppler active phased-array radar will operate within the 2GHz to 4GHz bandwidth. The 8 metre-long, 900kg antenna (using 1,280 phase shifters) will be mounted on the upper dorsal spine of the aircraft’s fuselage. The radar’s dorsal unit (DU) will include the carbon-fibre radome, antenna array, RF distribution network, and 192 transmit/receive modules that will be cooled by ram-air. Each such module will comprise a power amplifier for the transmitted microwave signal, low-noise amplifiers as front-ends for the receiver channels, and phase shifters for accurate control of the signal phase in both transmit and receive modes. In the latter, amplification of the signal will be controlled as well. The phases and amplitudes will be continuously calibrated. Each T/R module will be connected to one vertical slotted waveguide on each side. An electronic switch in the module will select the side. By feeding the slotted waveguide separately in the upper and lower half, the beam will be shifted in elevation for height measurement. This shifting will be conducted by single-step phase shifters in the front-ends of the modules. A module-control databus will provide control of the modules to achieve instantaneous antenna beam-steering and the very low sidelobes required. A receiver/exciter processor will generate the pulsed microwave signals and send them to the antenna. It will also accept the received signals from the DU and generate both digitised video signals for signals processing as well as data signals for steering the beam. The transmit drive signal will be generated by a frequency synthesizer and will be up-converted and modulated for pulse compression (using polyphase coding), and will be amplified before being sent to the DU. A programmable signal-and-data processor will receive the returned radar signals from the receiver/exciter via optical data links in digitised quadrature video format. The radial velocity of detected airborne targets will be determined from the Doppler frequency via combined signals from the T/R modules. By combining these signals, the processor will modify the effective antenna sidelobe pattern to place nulls in the direction of hostile jammers. The processor will also perform coherent integration by Fast Fourier Transform that will form a Doppler filter bank. This will be followed by pulse compression, constant false alarm rate processing and binary integration. Due to all this, the AESA radar’s processor will generate clutter- and interference-free position data for all targets.
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